# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -run-pass=regallocfast -verify-machineinstrs %s -o - | FileCheck %s
--- |
  ; ModuleID = 'x.c'
  source_filename = "x.c"
  target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
  target triple = "x86_64-unknown-linux-gnu"

  ; Function Attrs: noinline nounwind optnone
  define dso_local i32 @main() #0 {
  entry:
    %retval = alloca i32, align 4
    %x = alloca i32, align 4
    store i32 0, ptr %retval, align 4
    store i32 123, ptr %x, align 4
    %0 = callbr i32 asm "mov $1, $0\0A\09jmp ${2:l}", "=r,r,!i,~{dirflag},~{fpsr},~{flags}"(i32 45) #2
            to label %asm.fallthrough [label %label.split], !srcloc !5

  asm.fallthrough:                                  ; preds = %entry
    store i32 %0, ptr %x, align 4
    store i32 6, ptr %x, align 4
    br label %label

  label:                                            ; preds = %asm.fallthrough, %label.split
    %1 = load i32, ptr %x, align 4
    ret i32 %1

  label.split:                                      ; preds = %entry
    %2 = call i32 @llvm.callbr.landingpad.i32(i32 %0)
    store i32 %2, ptr %x, align 4
    br label %label
  }

  ; Function Attrs: nomerge nounwind
  declare i32 @llvm.callbr.landingpad.i32(i32) #1

  attributes #0 = { noinline nounwind optnone "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
  attributes #1 = { nomerge nounwind }
  attributes #2 = { nounwind memory(none) }

  !llvm.module.flags = !{!0, !1, !2, !3}
  !llvm.ident = !{!4}

  !0 = !{i32 1, !"wchar_size", i32 4}
  !1 = !{i32 8, !"PIC Level", i32 2}
  !2 = !{i32 7, !"PIE Level", i32 2}
  !3 = !{i32 7, !"frame-pointer", i32 2}
  !4 = !{!"clang version 17.0.0 (git@github.com:llvm/llvm-project.git cf86855c4453d029a9b9ed8c4c4c18cefc1bc895)"}
  !5 = !{i64 166, i64 179}

...
---
name:            main
alignment:       16
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
callsEHReturn:   false
callsUnwindInit: false
hasEHCatchret:   false
hasEHScopes:     false
hasEHFunclets:   false
debugInstrRef:   false
failsVerification: false
tracksDebugUserValues: false
registers:
  - { id: 0, class: gr32, preferred-register: '' }
  - { id: 1, class: gr32, preferred-register: '' }
  - { id: 2, class: gr32, preferred-register: '' }
  - { id: 3, class: gr32, preferred-register: '' }
  - { id: 4, class: gr32, preferred-register: '' }
  - { id: 5, class: gr32, preferred-register: '' }
  - { id: 6, class: gr32, preferred-register: '' }
liveins:         []
frameInfo:
  isFrameAddressTaken: false
  isReturnAddressTaken: false
  hasStackMap:     false
  hasPatchPoint:   false
  stackSize:       0
  offsetAdjustment: 0
  maxAlignment:    4
  adjustsStack:    false
  hasCalls:        false
  stackProtector:  ''
  functionContext: ''
  maxCallFrameSize: 4294967295
  cvBytesOfCalleeSavedRegisters: 0
  hasOpaqueSPAdjustment: false
  hasVAStart:      false
  hasMustTailInVarArgFunc: false
  hasTailCall:     false
  localFrameSize:  0
  savePoint:       ''
  restorePoint:    ''
fixedStack:      []
stack:
  - { id: 0, name: retval, type: default, offset: 0, size: 4, alignment: 4,
      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
  - { id: 1, name: x, type: default, offset: 0, size: 4, alignment: 4,
      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
callSites:       []
debugValueSubstitutions: []
constants:       []
machineFunctionInfo: {}
body:             |
  ; CHECK-LABEL: name: main
  ; CHECK: bb.0.entry:
  ; CHECK-NEXT:   successors: %bb.1(0x40000000), %bb.3(0x40000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into %ir.retval)
  ; CHECK-NEXT:   MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 123 :: (store (s32) into %ir.x)
  ; CHECK-NEXT:   renamable $eax = MOV32ri 45
  ; CHECK-NEXT:   INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2359306 /* regdef:GR32 */, def renamable $eax, 2359305 /* reguse:GR32 */, killed renamable $eax, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags, !5
  ; CHECK-NEXT:   MOV32mr %stack.3, 1, $noreg, 0, $noreg, $eax :: (store (s32) into %stack.3)
  ; CHECK-NEXT:   MOV32mr %stack.2, 1, $noreg, 0, $noreg, killed $eax :: (store (s32) into %stack.2)
  ; CHECK-NEXT:   JMP_1 %bb.1
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.1.asm.fallthrough:
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   $eax = MOV32rm %stack.2, 1, $noreg, 0, $noreg :: (load (s32) from %stack.2)
  ; CHECK-NEXT:   MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, renamable $eax :: (store (s32) into %ir.x)
  ; CHECK-NEXT:   MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 6 :: (store (s32) into %ir.x)
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.2.label:
  ; CHECK-NEXT:   renamable $eax = MOV32rm %stack.1.x, 1, $noreg, 0, $noreg :: (load (s32) from %ir.x)
  ; CHECK-NEXT:   RET64 implicit killed $eax
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT: bb.3.label.split (machine-block-address-taken, inlineasm-br-indirect-target):
  ; CHECK-NEXT:   successors: %bb.2(0x80000000)
  ; CHECK-NEXT:   liveins: $eax
  ; CHECK-NEXT: {{  $}}
  ; CHECK-NEXT:   MOV32mr %stack.3, 1, $noreg, 0, $noreg, $eax :: (store (s32) into %stack.3)
  ; CHECK-NEXT:   $eax = MOV32rm %stack.3, 1, $noreg, 0, $noreg :: (load (s32) from %stack.3)
  ; CHECK-NEXT:   MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, killed renamable $eax :: (store (s32) into %ir.x)
  ; CHECK-NEXT:   JMP_1 %bb.2
  bb.0.entry:
    successors: %bb.1(0x40000000), %bb.3(0x40000000)

    MOV32mi %stack.0.retval, 1, $noreg, 0, $noreg, 0 :: (store (s32) into %ir.retval)
    MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 123 :: (store (s32) into %ir.x)
    %2:gr32 = MOV32ri 45
    INLINEASM_BR &"mov $1, $0\0A\09jmp ${2:l}", 0 /* attdialect */, 2359306 /* regdef:GR32 */, def %1, 2359305 /* reguse:GR32 */, %2, 13 /* imm */, %bb.3, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags, !5
    %0:gr32 = COPY %1
    JMP_1 %bb.1

  bb.1.asm.fallthrough:
    successors: %bb.2(0x80000000)

    MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, %0 :: (store (s32) into %ir.x)
    MOV32mi %stack.1.x, 1, $noreg, 0, $noreg, 6 :: (store (s32) into %ir.x)

  bb.2.label:
    %6:gr32 = MOV32rm %stack.1.x, 1, $noreg, 0, $noreg :: (load (s32) from %ir.x)
    $eax = COPY %6
    RET64 implicit $eax

  bb.3.label.split (machine-block-address-taken, inlineasm-br-indirect-target):
    successors: %bb.2(0x80000000)

    %3:gr32 = COPY %1
    MOV32mr %stack.1.x, 1, $noreg, 0, $noreg, %3 :: (store (s32) into %ir.x)
    JMP_1 %bb.2

...
